Verilog code for 4 bit synchronous up/down counter using jk flip flop

hey,

I need a Verilog code for 4 bit Synchronous Up/Down Counter using jk flip flop I need the code depending on the logic diagram attached also I need the test code with the waveform and explanation .

 u can check out this site for ref http://www.electronicshub.org/synchronous-counter/

 

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